公司简介
澜起科技
所属团队
职位属性
招聘类型：社招
工作性质：全职
职位描述
- Design, evaluate and verify CMOS analog circuits ( PLL、DDR、USB、HDMI、ADAC、VDAC);
- Oversee layout and verification activities which include floor plan, LVS and DRC.
- Support Product SerDes related issue trouble-shooting.
任职条件
- Bachelor degree or Master degree in ASIC Design Relevant;
- At least 3 years in RF/Analog IC design;
- Good fundamental in analysis and design of analog / mixed-signal circuits; Experience in Verilog, AHDL and/or Matlab; Ability to do layout and provide verification/debugging guidance; Solid knowledge of EDA design tools (Analog artist, spectre, HSPICE and nc-verilog ...); Familiar with Computer languages such as C, C++, perl;
- Experience in any of the following areas is preferred: PLL, high-speed I/O’s;
- Good communication skills and Good oral/written English.