元夕 · 测试公司

设计验证工程师

薪资面议  /  上海

昨天 15:41 更新

我要推荐 内部推荐

若你发现本职位存在违规现象，欢迎举报。

提交成功

3s后自动关闭

 举报职位

职位属性

招聘类型：社招
工作性质：全职

职位描述

  1. Participate ASIC digital verification for memory buffer (DDR& LPDDR) projects;
  2. Create verification plans with designers;
  3. Develop ref-model and function coverage;
  4. Develop test sequence and test case, collect function/code coverage to 100%;
  5. Bug analysis/report/tracking;


任职条件

  1. Excellent team working style;
  2. Solid IP verification background;
  3. Mass production experiences on DDR/LPDDR protocol;
  4. Bachelor with 4+ years working experiences on ASIC digital verification;
  5. Production experiences on verification strategies and test plans;
  6. Familiar with System Verilog/UVM for test bench creation, debug, reuse, constrained-random stimulus and functional coverage;
  7. Familiar with verification tools;
  8. Familiar with Linux, csh /Python or any script languages;
  9. Good English skills (read and write).


展开查看详情